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Chip Scale Atomic Clock (CSAC)


Symmetricom invented portable atomic timekeeping with QUANTUM™, a family of atomic oscillators that offers best-in-class stability, size, weight and power consumption, making them suitable for a variety of applications ranging from telecom networks to aerospace & defense. The SA.45s Chip Scale Atomic Clock (CSAC) is the world’s first commercially available chip scale atomic clock, enabling a new class of atomic clock applications, defined by portability. Learn more about CSAC’s innovative technology, product features, performance specs, example applications and more.

Shock and Vibration Testing of the SA.45s Chip Scale Atomic Clock (CSAC)

The Symmetricom® SA.45s Chip Scale Atomic Clock (CSAC) is designed for field applications where atomic clocks typically have not been deployed before. It is smaller, lighter and uses less power than any previous atomic clock and is engineered to withstand higher levels of shock and vibration. This paper summarizes a series of mechanical shock and vibration tests to confirm the CSAC’s hardware environmental performance.

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The SA.45s Chip-Scale Atomic Clock – Early Production Statistics (PTTI Conference 2011)

Since the announcement of general availability of the SA.45s Chip-Scale Atomic Clock (CSAC) on January 18, 2011, Symmetricom has been ramping up production in order to meet customer demand for this new and disruptive technology. The SA.45s is the first commercially-available CSAC, with power consumption of <125 mW and short-term stability of y(τ) < 3 x 10-10/τ1/2. This paper will report early production statistics of SA.45s performance including power consumption, short-term stability, and temperature sensitivity. Environmental susceptibility measurements of production devices will also be presented, including mechanical shock, vibration, and total-ionizing dose radiation exposure.

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Leading Edge Technology Enables a Chip Scale Atomic Clock

This paper examines the technology, product features, performance specifications and several example applications of the Symmetricom CSAC SA.45s — the world’s first chip scale atomic clock.

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The Chip-Scale Atomic Clock-Prototype Evaluation (PTTI Conference 2007)

The authors have developed a chip-scale atomic clock (CSAC) for applications requiring atomic timing accuracy in portable battery-powered applications. At PTTI/FCS 2005, we reported on the demonstration of a prototype CSAC, with an overall size of 10 cm3, power consumption »150 mW, and short-term stability sy(t)<1x10-9t-1/2. Since that report, we have completed the development of the CSAC, including provision for autonomous lock acquisition and a calibrated output at 10.0 MHz, in addition to modifications to the physics package and system architecture to improve performance and manufacturability.

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An Ultra-Low-Power Physics Package for a Chip-Scale Atomic Clock (IEEE Transducers Conference 2005)

We report the design and measured thermal and mechanical performance of an ultra-low-power physics package for a Chip-Scale Atomic Clock (CSAC). This physics package will enable communications and navigation systems that require a compact, low-power atomic frequency standard.

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Time on a Chip: The Incredible Shrinking Atomic Clock, New York Times 2004

A media perspective on the chip scale atomic clock innovations.

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The Chip-Scale Atomic Clock: Low-Power Physics Package (PTTI Conference 2004)

We have undertaken a development effort to produce a prototype chip-scale atomic clock (CSAC). The design goals include short-term stability, σy(τ) < 6 x 10-10 τ-1/2, with a total power consumption of less than 30 mW and overall device volume < 1 cm3. In the past year, the development effort has shifted from fundamental research and feasibility investigation to engineering and prototype development. In this paper, we report on the design of a rugged and compact physics package that is expected to exceed the ultimate performance and power requirements of the CSAC.

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The Chip-Scale Atomic Clock: Recent Development Progress (PTTI Conference 2003)

We have undertaken the development of a chip-scale atomic clock (CSAC) whose design goals include short-term stability, σy(τ = 1 hour), of 1x10-11 with a total power consumption of 30 mW and an overall device volume of 1 cm3. This paper describes our further progress on the CSAC effort, including the development of custom vertical cavity surface emitting laser (VCSEL) sources and techniques for microfabricating miniature cesium vapor cells comprised of anodically bonded silicon and glass.

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The Chip-Scale Atomic Clock: Coherent Population Trapping vs. Conventional Interrogation (PTTI Conference 2002)

Symmetricom-TRC has undertaken a development effort to produce a prototype chip-scale atomic clock (CSAC). The overall architecture of the CSAC and, in particular, the physics package, must be defined early in the project, prior to the onset of a large-scale engineering effort. Within the constraints imposed by the performance goals of the project we have recognized two possible schemes for interrogating the ground-state hyperfine frequency of the gaseous atomic ensemble: the conventional double-resonance technique and the coherent population trapping technique. In this paper we describe a laboratory apparatus, which allows for in situ comparison of the two techniques, without the ambiguities associated with comparing data from disparate experiments. Data is presented comparing the short-term stability resultant of the two techniques, as well as environmental sensitivity to resonance cell temperature, laser intensity, and RF power.

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